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	(paper "A4")
	(title_block
		(title "Transistors are switches?")
		(date "2024-04-28")
		(company "Silicon Chronicles")
		(comment 1 "Building AND gates the wrong way")
		(comment 2 "Part III")
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	(text "AND gate 1.0 misbehaves when B is high. Pins 2 to 3 of Q2 form a diode,\nso the path Through R6/Q2/Q4 is a voltage divider, and output\nwill be around 2.15V\n\nAND gate 1.1 mitigates the issue by increasing the value of resistors R7\nand R8. There is a voltage divider through R8/Q4/R9, but now the\noutput (if B is high) is around 0.4V\n\nHowever the chained gates show another problem. When all \n4 inputs are high, Q6 will still ensure a voltage drop between B and\nthe output of the first gate, which will drop again through Q8 making\nthe output of the second gate even lower; finally Q10 will drop again\nso the final output of a gain will have three voltage drops (of about\n0.7V each; and that's not even counting the drop throw R12/R15/R18).\nSo as the gates are chained, the output is always lower than the\nsecond input, guaranteeing that the signal degrades eventually.\n\nTL;DR: Don't use these gates :) You can use v1.1 if there's some\nbuffer/amplifier later that recovers your signal."
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	(text "A and B and C\n\n"
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	(text "Transistor AND \"gate\" 1.1\n(Identical to 1.0 except for R values)"
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	(text "Chain of 3 × Transistor AND \"gate\" 1.1"
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	(text "SPDT switch Input"
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	(text "A and B and C and D\n"
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	(text "A and B\n"
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	(text "Transistor AND \"gate\" 1.0\n"
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	(text "A and B\n"
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